It is often desirable to reduce the amount of power being consumed by an electronic device such as a desktop PC, laptop PC, camera, cell phone, networked computing device (e.g., a server), tablet (e.g., an Apple® iPad®), video game console, satellite navigation device, personal digital assistant (PDA), etc. Reducing the power consumption of a device is advantageous for several reasons. For example, in a device that has a limited power-source (e.g., a battery-powered device), reducing the amount of power consumed by the device can extend the amount of time that the device can be operated. Additionally, a reduction in power consumption can lower the internal temperature affecting circuitry in the device. As such, the overall size of the device can be reduced because bulky cooling systems can be sized-down or eliminated entirely. Furthermore, reducing the amount of power consumed by a device can lower the operating costs associated with the device (e.g., by reducing the frequency with which batteries need to be replaced).
Accordingly, a number of techniques have been developed for reducing the amount of power consumed by electronic devices. One known technique involves lowering the clock frequency of memory clients associated with the device (as clock frequency is proportional to energy consumption). Another technique involves lowering the core power rail voltage (i.e., the voltage of the processor or memory client). An additional technique utilizes clock branches in the memory controller. This technique involves shutting off different clock branches to reduce the amount of switching or clock gating, thereby lowering power consumption.
However, these conventional techniques suffer from a number of drawbacks. For example, existing electronic devices typically employ a single memory controller that services all memory clients. Because of the complexity involved in servicing a vast number of memory clients, conventional memory controllers typically contain several functional elements including, for example, crossbar switches, arbiters, virtual memory translators, tiling translators, etc. These complex memory controllers are known to consume a great deal of power.
Accordingly, there exists a need for improved circuits and methods for providing adjustable power consumption.